Browsing by Author "Vodanovic, Gonzalo"

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    Estrategia de test para una fuente de corriente para resonancia magnética nuclear de campo ciclado
    (IEEE, 2022-09-07) Velez Ibarra, María Delfina; Vodanovic, Gonzalo; Peretti, Gabriela Marta; Romero, Eduardo Abel; Anoardo, Esteban
    Este trabajo presenta una estrategia de test estructural para la fuente de corriente de un aparato de resonancia magnética nuclear por ciclado rápido de campo. El test se resuelve como un problema de clasificación de series temporales, y la evaluación de las mejores condiciones para el test se realiza recurriendo a una campaña de simulación de fallas. Empleamos conceptos de modelado de fallas propuestos por otros autores y desarrollamos un modelo de falla no direccionado previamente para el caso de un transistor MOS. También consideramos fallas en los demás componentes del circuito y cortocircuitos entre nodos. Las fallas son de tipo catastrófico, únicas y permanentes. La campaña de inyección y simulación de fallas se realiza en la plataforma Simulink (Simscape) de Matlab. Las mejoras al modelo de simulación de la fuente de corriente, necesario para simular fallas, son también presentadas aquí y validadas contra resultados experimentales. El análisis de los patrones de respuesta de test se realiza con un clasificador basado en una red neuronal. Se presenta una exploración de diferentes condiciones de operación del test, seleccionándose como candidata la de mejor rendimiento. En particular, se seleccionó la que presentó la mayor cantidad de circuitos sin fallas clasificados correctamente y la menor cantidad de circuitos con fallas sin detectar. Se presenta también un análisis de las fallas difíciles de detectar. El esquema de test alcanza un rendimiento sobresaliente, tal como indican nuestros resultados de simulación.
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    Frequency domain test scheme of a current source for nuclear magnetic resonance
    (IEEE, 2024-09-18) Laprovitta, Agustín Miguel; Velez Ibarra, María Delfina; Vodanovic, Gonzalo; Peretti, Gabriela Marta; Romero, Eduardo Abel; Anoardo, Esteban
    Nuclear magnetic resonance techniques in magnetic metrology applications require the generation of a highly homogeneous field. This is achieved by exciting a magnet with a high-stability variable current source or feeder. One way to improve the source's reliability is by employing periodic field testing strategies. This work proposes a structural-type test for a feeder based on a three-phase converter with Cuk topology that employs low-complexity measurements. In test mode, the open-loop circuit under test is exercised with a stimulus that causes a step variation in the output current. The current signal is analyzed using a fast Fourier transform. It is assumed that a fault will cause a variation in the magnitude of selected spectrum components, making it observable. The test performance is evaluated through a fault injection and simulation procedure on the Matlab Simscape platform, employing models of single catastrophic faults. The work includes an analysis of the detection capacity of the method under conditions of variability in the power supply of the source. The fault injection and simulation campaign results show that the method's efficiency is very good, with only a single undetected fault.
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    In-field Built-in Self-Test for Detecting Incipient Faults in Analog Reconfigurable Filters
    (Springer, 2024-09-28) Velez Ibarra, María Delfina; Vodanovic, Gonzalo; Laprovitta, Agustín Miguel; Peretti, Gabriela Marta; Romero, Eduardo Abel
    In critical applications, a fault in the analog sections of a complex integrated circuit implies severe risks, compromising the mission or potentially causing harm to the people or the ambient. In this context, detecting faults during the operation in the field becomes mandatory, and built-in self-test (BIST) arises as suitable for this purpose. This paper presents an innovative user-oriented in-field BIST solution for switchedcapacitor (SC) filters embedded in analog-configurable PSoC™ analog coprocessor (PSoC-AC) from Infineon Technologies AG. The BIST targets catastrophic faults in switches and deviation faults in capacitors, adopting the single-fault paradigm. The method is based on comparing the time-domain responses of the filter (for step input) against a pre-established pattern using a low computational cost signal similarity measure (SSM). The scheme implements the test signal generator and response analyzer with the resources available in the selected platform. This, along with the simple SSM used, achieves zero hardware overhead and low penalty in the memory available for the user application. Themethod does not require sophisticated signal processing techniques, reducing it to a simple offset removal process. The paper reports an extensive experimental fault injection and measurements campaign. Additionally, it extends the evaluations through fault simulation characterization using a low-cost filter model to establish the lowest deviation fault the method can detect in capacitors. The results show an outstanding performance, detecting all the considered catastrophic faults. Regarding deviation faults, the method detects incipient ones, which is a relevant aspect because the BIST can detect degradations at an early stage."